从init.s中跳到Syslib.c中的sysInit()C语言入口函数:
la t0, sysInit
/* Jump it */
jal t0
对于volatile类型的变量,系统每次用到他的时候都是直接从对应的内存当中提取,而不会利用cache当中的原有数值,以适应它的未知何时会发生的变化,系统对这种变量的处理不会做优化——显然也是因为它的数值随时都可能变化的情况。
进入SysInit()函数后:
关GPIO0 。
ROM_Timimg 以及UART初始化,在UART之后利用判断
TRAP_VALUE_1和2的值是否还是原值,如果不是原值则发现缺陷,这里用循环提示,其实可以提示后退出。
然后得到当前时钟周期,SYS_CPUPLL是保存有当前时钟频率类型的寄存器,bus_clk_rate是cpu_clk_rate的一半,clkperusec = bus_clk_rate / 1000000;得到没微秒执行的周期数。
eraDevInit(); 初始化中断控制向量表,然后初始化TLB、Cache、各种异常向量表,还有中断处理函数向量表。
for(i = 0; i < IV_ERASOC_MAX; i++)
eraIntTbl[i] = (U32 *)sysReservedHandler;
将每个中断处理函数都指向 sysReservedHandler系统保留的默认的中断处理函数,继而针对每个特定的中断处理函数单独初始化。然后使能特定中断2~7。
然后初始化Uart,虚拟内存图(Initialise "virtual memory" maps)vminit(), 内存分配kmeminit(),
eraTimerInit(); 设置中断事件周期数,eraTimerClkPerTick = (bus_clk_rate / OS_TICKS_PER_SEC);eraTimerIntEnable(); eraTimerClkPerTick周期中响应一次中断,也就是没秒钟有OS_TICKS_PER_SEC时钟中断。
然后start floating point function
read_32bit_cp1_register(uiFCR,R_C1_FCSR); //start floating point function
sysPrintf("The default R_C1_FCSR: 0x%x/n", uiFCR);
//uiFCR &= (~M_FCSREnaI);
uiFCR = M_FCSRFS | M_FCSRImpl;
write_32bit_cp1_register(R_C1_FCSR, uiFCR);
然后开GPIO0,era_writel(era_readl(ERASOC_GPIO0_MUXEN) &~ 0x00000028, ERASOC_GPIO0_MUXEN); 从3端口输出,5端口输入。
erasoc_gpio_set_output(3);
erasoc_gpio_write(3, 0);
erasoc_gpio_set_input(5);
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然后初始化LCD液晶屏显示,LCD接的的GPIO2端口,在PSB_PIN信号口些0然后写1,(先清屏,再置屏亮)
lcd_set_gpio(PSB_PIN, S_MODE);
delay(300);
cd_set_gpio(PSB_PIN, P_MODE);然后lcdreset(); //初始化LCD屏
void lcdreset()
{
//int i;
//int temp;
delay(2000);
write_com(0x30); // 0011 0000
delay(10); //选择基本指令集
write_com(0x30); //选择8bit数据流
delay(5);
write_com(0x0c/*0x0F*/); //开显示(无游标、不反白)
delay(10);
write_com(0x01); //清除显示,并且设定地址指针为00H
delay(500);
write_com(0x06);//指定在资料的读取及写入时,设定游标的移动方向及指定显示的移位
delay(10);}
最后ds_rtc_init()初始化时钟Real-Time Clock,完成基本的配置。
static volatile U32 trapValue1 = TRAP_VALUE_1; static volatile U32 trapValue2 = TRAP_VALUE_2; //int rc; era_writel(0x0000ff00 | era_readl(ERASOC_GPIO0_MUXEN), ERASOC_GPIO0_MUXEN); era_writel((~ERASOC_SPIEN) & era_readl(ERASOC_ROM_TIMING1), ERASOC_ROM_TIMING1); /* UART initialization */ for (i=0; i<UART_CHANNEL_NUM; i++) { EraSerialChan[i].regs = (U8 *)EraSerialChanParas[i].baseAdrs; EraSerialChan[i].level = EraSerialChanParas[i].vector; EraSerialChan[i].ier = 0; EraSerialChan[i].lcr = 0; EraSerialChan[i].mcr = MCR_OUT2; EraSerialChan[i].pad1 = 0; EraSerialChan[i].channelMode = SIO_MODE_INT; EraSerialChan[i].regDelta = EraSerialChanParas[i].regSpace; EraSerialChan[i].baudRate = EraSerialBaudRate[i]; EraSerialChan[i].xtal = UART_XTAL_FREQ; EraSerialChan[i].options = (CLOCAL | CREAD | CS8); EraSerialChan[i].xmit.buf = xmit_buf[i]; EraSerialChan[i].rev.buf = rev_buf[i]; uart_circ_clear(&EraSerialChan[i].xmit); uart_circ_clear(&EraSerialChan[i].rev); eraSerialInit(&EraSerialChan[i]); } while (trapValue1 != TRAP_VALUE_1 || trapValue2 != TRAP_VALUE_2) { sysPrintf("trapped!/n"); } tmp = *((volatile U32 *) SYS_CPUPLL); //cpu_clk_rate= (((*(volatile U32*)SYS_CPUPLL) & 0x1F) + 1) * 12000000; cpu_clk_rate= ((tmp & 0x1F) + 1) * 12000000; sysPrintf("EraSoC CPU %d MHz/n", cpu_clk_rate/1000000); bus_clk_rate = cpu_clk_rate / 2; clkperusec = bus_clk_rate / 1000000; /* Timer Init */ /* DEV INT */ eraDevInit(); /* Hook general IntHandler */ /* TLB refill error , addr 0*/ *((U32*)((KSEG0BASE + 0*4) | 0xa0000000)) = HETOTE32(IntConnectCode[0] | HI16(sysTLBHandler)); *((U32*)((KSEG0BASE + 1*4) | 0xa0000000)) = HETOTE32(IntConnectCode[1] | LO16(sysTLBHandler)); *((U32*)((KSEG0BASE + 2*4) | 0xa0000000)) = HETOTE32(IntConnectCode[2]); *((U32*)((KSEG0BASE + 3*4) | 0xa0000000)) = HETOTE32(IntConnectCode[3]); /* Cache error, addr 0x100 */ *((U32*)((aESR_CACHE_ERR + 0*4) | 0xa0000000)) = HETOTE32(IntConnectCode[0] | HI16(sysCacheHandler)); *((U32*)((aESR_CACHE_ERR + 1*4) | 0xa0000000)) = HETOTE32(IntConnectCode[1] | LO16(sysCacheHandler)); *((U32*)((aESR_CACHE_ERR + 2*4) | 0xa0000000)) = HETOTE32(IntConnectCode[2]); *((U32*)((aESR_CACHE_ERR + 3*4) | 0xa0000000)) = HETOTE32(IntConnectCode[3]); /* All other exceptions, entry point at 0x180 */ for (i=0; i<sys180HandlerSize/4; i++) { *((U32*)((aESR_INT + i*4) | 0xa0000000)) = HETOTE32(*((U32*)sys180Handler + i)); } /* Hook EraSoc IntHandler */ for(i = 0; i < IV_ERASOC_MAX; i++) eraIntTbl[i] = (U32 *)sysReservedHandler; eraIntTbl[IV_INT] = (U32 *)OSIntHandler; eraIntTbl[IV_FPE] = (U32 *)sysFPEHandler; eraIntTbl[IV_INT0_VEC] = (U32 *)eraIntHandler; eraIntTbl[IV_INT1_VEC] = (U32 *)eraIntHandler; eraIntTbl[IV_INT5_VEC] = (U32 *)eraTimerIntHandler; CP0EnableIM(C0_STATUS_IM_HW0); /* 2 */ CP0EnableIM(C0_STATUS_IM_HW1); /* 2 */ CP0EnableIM(C0_STATUS_IM_HW2); /* 2 */ CP0EnableIM(C0_STATUS_IM_HW3); /* 2 */ CP0EnableIM(C0_STATUS_IM_HW4); /* 2 */ CP0EnableIM(C0_STATUS_IM_HW5); /* 7 */ /* ********Initialise uart interrrupt****** */ init_uart_int(); //uiFCR = M_FCSRFS | M_FCSRImpl; //write_32bit_cp1_register(R_C1_FCSR, uiFCR); sysPrintf("uart init ok!/n"); /* * Initialise "virtual memory" maps */ vminit(); /* erasoc_gpio_set_output(3); erasoc_gpio_write(3, 1); */ /* * Initialise memory allocator */ kmeminit(); eraTimerInit(); //Open CPU INT, SR bit 1 read_32bit_cp1_register(uiFCR,R_C1_FCSR); //start floating point function sysPrintf("The default R_C1_FCSR: 0x%x/n", uiFCR); //uiFCR &= (~M_FCSREnaI); uiFCR = M_FCSRFS | M_FCSRImpl; write_32bit_cp1_register(R_C1_FCSR, uiFCR); era_writel(era_readl(ERASOC_GPIO0_MUXEN) &~ 0x00000028, ERASOC_GPIO0_MUXEN); sysPrintf("ERASOC_GPIO0_MUXEN:0x%X/n", era_readl(ERASOC_GPIO0_MUXEN)); erasoc_gpio_set_output(3); erasoc_gpio_write(3, 0); erasoc_gpio_set_input(5); /* cpu_freq_192m_to_96m(); delay(1000000); sysPrintf("/n---------------------------------------------------/n"); cpu_clk_rate= ((*(U32*)SYS_CPUPLL & 0x1F) + 1) * 12000000; sysPrintf("EraSoC CPU %d MHz-----/n", cpu_clk_rate/1000000); */ lcd_init_gpio(); sysPrintf("begin to test lcd /r/n"); lcd_set_gpio(PSB_PIN, S_MODE); delay(300); lcd_set_gpio(PSB_PIN, P_MODE); lcdreset(); //初始化LCD屏 start_display(); ds_rtc_init(); //init ds12887 rtc