JSR133

1、jsr-faq
https://www.cs.umd.edu/~pugh/java/memoryModel/jsr-133-faq.html

What is a memory model, anyway?

In multiprocessor systems, processors generally have one or more layers of memory cache, which improves performance both by speeding access to data (because the data is closer to the processor) and reducing traffic on the shared memory bus (because many memory operations can be satisfied by local caches.) Memory caches can improve performance tremendously, but they present a host of new challenges. What, for example, happens when two processors examine the same memory location at the same time? Under what conditions will they see the same value?
在多处理器系统中,处理器通常有一个或多个内存缓存层,这从两个方面提高了性能,一是加速访问数据(因为数据更接近处理器),二是减少共享内存总线上的流量(因为许多内存操作可以通过本地缓存来满足)。

At the processor level, a memory model defines necessary and sufficient conditions for knowing that writes to memory by other processors are visible to the current processor, and writes by the current processor are visible to other processors. Some processors exhibit a strong memory model, where all processors see exactly the same value for any given memory location at all times. Other processors exhibit a weaker memory model, where special instructions, called memory barriers, are required to flush or invalidate the local processor cache in order to see writes made by other processors or make writes by this processor visible to others. These memory barriers are usually performed when lock and unlock actions are taken; they are invisible to programmers in a high level language.
在处理器层面,内存模型定义了必要且充分的条件,以便知道不同处理器对内存写入对其他处理器可见。某些处理器表现出强大的内存模型,其中所有的处理器在任何时间,任何内存位置都看到一致的值。其他处理器表现出较弱的内存模型,其中需要特殊的指令(称为内存屏障)来刷新或使本地处理器缓存无效,以便查看其他处理器的写入或使该处理器的写入对其他处理器可见。这些内存屏障通常在执行锁定和解锁操作时执行;对于高级语言的程序员来说,它们是不可见的。

It can sometimes be easier to write programs for strong memory models, because of the reduced need for memory barriers. However, even on some of the strongest memory models, memory barriers are often necessary; quite frequently their placement is counterintuitive. Recent trends in processor design have encouraged weaker memory models, because the relaxations they make for cache consistency allow for greater scalability across multiple processors and larger amounts of memory.
由于减少了对内存屏障的使用,有些时候强内存模型编写程序可能会更容易。但是,即使在某些最强大的内存模型上,也经常需要使用内存屏障,它们的放置经常违反直觉。处理器设计的最新趋势也在鼓励使用较弱的内存模型,因为它们对缓存一致性的放宽使得跨多个处理器的可伸缩性更强,内存量也更大。

The issue of when a write becomes visible to another thread is compounded by the compiler's reordering of code. For example, the compiler might decide that it is more efficient to move a write operation later in the program; as long as this code motion does not change the program's semantics, it is free to do so. If a compiler defers an operation, another thread will not see it until it is performed; this mirrors the effect of caching.
编译器对代码的重新排序使不同线程之间可见性的问题更加复杂。例如,编译器可能会觉得在程序中把某个写操作后置会更高效,只要此代码改动不会更改程序的语义,就可以自由进行更改。如果编译器推迟了某个操作,则另一个线程将不会看到它,直到执行该操作为止。这反映了缓存的效果。

Moreover, writes to memory can be moved earlier in a program; in this case, other threads might see a write before it actually "occurs" in the program. All of this flexibility is by design -- by giving the compiler, runtime, or hardware the flexibility to execute operations in the optimal order, within the bounds of the memory model, we can achieve higher performance.
此外,在一个程序中,对内存的写入可以被提前一些。在这种情况下,其他线程可能会在该程序中实际“发生”之前看到一次写入。所有这些灵活性的设计 -- 通过使编译器,运行中或硬件,使得在内存模型的范围内以最佳顺序执行,从而可以实现更高的性能。

A simple example of this can be seen in the following code:

Class Reordering {
  int x = 0, y = 0;
  public void writer() {
    x = 1;
    y = 2;
  }

  public void reader() {
    int r1 = y;
    int r2 = x;
  }
}

Let's say that this code is executed in two threads concurrently, and the read of y sees the value 2. Because this write came after the write to x, the programmer might assume that the read of x must see the value 1. However, the writes may have been reordered. If this takes place, then the write to y could happen, the reads of both variables could follow, and then the write to x could take place. The result would be that r1 has the value 2, but r2 has the value 0.
这段代码被两个线程并行执行,经过编译器的重新排序,y=2可能先被执行。结果是,r1的值是2,而r2的值是0。

The Java Memory Model describes what behaviors are legal in multithreaded code, and how threads may interact through memory. It describes the relationship between variables in a program and the low-level details of storing and retrieving them to and from memory or registers in a real computer system. It does this in a way that can be implemented correctly using a wide variety of hardware and a wide variety of compiler optimizations.
java的内存模型描述了在多处理器代码中何种操作是合法的,以及线程如何通过内存进行交互。它描述了程序中变量与低级详细信息之间的关系,这些低级详细信息在实际计算机系统中的存储器或寄存器之间进行存储以及从中检索和检索它们。它以可以使用各种硬件和各种编译器优化正确实现的方式来执行此操作。

Java includes several language constructs, including volatile, final, and synchronized, which are intended to help the programmer describe a program's concurrency requirements to the compiler. The Java Memory Model defines the behavior of volatile and synchronized, and, more importantly, ensures that a correctly synchronized Java program runs correctly on all processor architectures.
Java包括几种语言构造,包括 volatile, final, 和 synchronized,旨在帮助程序员向编译器描述程序的并发要求。Java内存模型定义了volatile 和 synchronized的行为,更重要的是,确保正确的同步Java程序可以在所有处理器体系结构上正确运行。

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