Makefile 例子

C_SOURCES = (wildcard kernel/.h drivers/.h)

Nice syntax for file extension replacement

OBJ = ${C_SOURCES:.c=.o}

Change this if your cross-compiler is somewhere else

CC = /usr/local/i386elfgcc/bin/i386-elf-gcc
GDB = /usr/local/i386elfgcc/bin/i386-elf-gdb

-g: Use debugging symbols in gcc

CFLAGS = -g

First rule is run by default

os-image.bin: boot/bootsect.bin kernel.bin
cat $^ > os-image.bin

'--oformat binary' deletes all symbols as a collateral, so we don't need

to 'strip' them manually on this case

kernel.bin: boot/kernel_entry.o @ -Ttext 0x1000 $^ --oformat binary

Used for debugging purposes

kernel.elf: boot/kernel_entry.o @ -Ttext 0x1000 $^

run: os-image.bin
qemu-system-i386 -fda os-image.bin

Open the connection to qemu and load our kernel-object file with symbols

debug: os-image.bin kernel.elf
qemu-system-i386 -s -fda os-image.bin &
${GDB} -ex "target remote localhost:1234" -ex "symbol-file kernel.elf"

Generic rules for wildcards

To make an object, always compile from its .c

%.o: %.c {CC} < -o $@

%.o: %.asm
nasm @

%.bin: %.asm
nasm @

clean:
rm -rf .bin .dis .o os-image.bin .elf
rm -rf kernel/.o boot/.bin drivers/.o boot/.o

C_SOURCES = $(wildcard kernel/.c drivers/.c)

#${C_SOURCES}==wildcard kernel/*.c drivers/*.c

HEADERS = $(wildcard kernel/.h drivers/.h)

#${HEADERS}==wildcard kernel/*.h drivers/*.h

OBJ = ${C_SOURCES:.c=.o}

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